1. Field of the Invention
The present invention relates to a photosensitive device for infrared radiation.
2. Description of the Prior Art
An infrared-sensitive device was disclosed in an article entitled "Electronically scanned C.M.T. detector array for the 8-14 .mu.m band" and published in the issue dated Apr. 1st 1982 of "Electronics Letters", volume 18, No 7, pages 285 to 287. This device will be described with reference to FIG. 1 of the accompanying drawings.
This known device comprises a lattice network of N lines and M columns of infrared detectors integrated on a semiconductor substrate. The detectors D.sub.11, D.sub.21, D.sub.31 . . . , D.sub.12, D.sub.22, D.sub.32 . . . are photodiodes integrated on a semiconductor substrate of cadmium, mercury and telluride (C.M.T.). An MOS transistor T.sub.1. is associated with each photodiode. It is apparent from FIG. 1 that the anode of each photodiode is connected to ground and its cathode is connected to an MOS transistor T.sub.1 A first array of vertical electrodes connects the gates of the MOS transistors which are associated with the detectors of one and the same column. A second array of horizontal electrodes connects the MOS transistors which are associated with the detectors of one and the same line. A first shift register serves to address successively each electrode of the first array. When an electrode of the first array is addressed, there takes place an integration of the charges corresponding to the infrared radiation received by the detectors which are connected to this electrode, for example the detectors D.sub.11, D.sub.12, D.sub.13 in FIG. 1. Integration of the charges is performed by operational amplifiers which are mounted as integrators, with a capacitor C.sub.1, C.sub.2, C.sub.3 between their negative input and their output, and which are connected to each electrode of the second array. A multiplexer receives the outputs of the amplifiers and delivers a signal S for serial reading of the charges integrated in the detectors of one column. Integration of the charges of the detectors D.sub.21, D.sub.22, D.sub.23 of the following column then begins.
The first MOS transistors T.sub.1 as well as the first shift register are integrated on a semiconductor substrate of silicon, said substrate being interconnected with the substrate which carries the infrared detectors. The first MOS transistors T.sub.1 and the first shift register are placed within the same cryostat as the infrared detectors, said cryostat being brought to a temperature of 77 K.
The problem which arises and has now been solved by the present invention lies in the fact that the operational amplifiers mounted as integrators cannot be placed within the cryostat. Since they have high power consumption and therefore attain high operating temperatures, this would make it difficult to place them within the cryostat. In addition, it is on account of their high power consumption that these amplifiers are constructed in the form of discrete components and are cumbersome.
As a consequence, it is necessary to establish a large number of connections between the cryostat and the remainder of the device. Furthermore, the connections between the cryostat and the operational amplifiers carry low-level signals which are sensitive to transient disturbances.